This relates generally to the fabrication of integrated circuits.
In the fabrication of integrated circuits, metal lines may be formed to carry signals between integrated components. One factor that adversely affects the signals carried along such metal lines is capacitance between proximate metal lines. The capacitance is a function of the dielectric constant of the dielectric material between the metal lines. Thus, it is advantageous to form dielectrics between metal lines with relatively low dielectric constants.
For example, in the widely used damascene process, trenches are formed in a dielectric and these trenches may be filled with metal layers to form metal lines. Thus, the dielectric between the metal lines is actually formed before the lines themselves.
Existing techniques for forming dielectric layers of lower dielectric constant generally result in relatively low mechanical strength. Thus, the resulting integrated circuits may be more prone to failure because of the poor mechanical characteristics of the lower dielectric constant dielectric layer.